Electrical Performance Enhanced Doping Less Tunnel Field Effect Transistor by Metal Electrode Work Function Engineering

Abstract

Tunnel field effect transistor (TFET) has been proposed as one of the promising alternative devices to MOSFET since it has low power consumption and excellent subthreshold swing (SS) characteristics of less than 60 mV / dec. However, conventional TFET fabrication requires ion implantation process to form p-i-n structure in active region, which induces a random distribution of dopant atoms. In the nm-scale device, even a small number of dopant atom dispersion can cause electrical characteristic variations such as threshold voltage (Vt)1, so alternative method for forming p-i-n region instead of doping process is needed.Doping-less TFET (DL-TFET) introduces charge plasma concept2 that controls carrier concentration of Si region by band alignment in MOS contact not by doping process, so random dopant fluctuation (RDF) issue can be solved. Since the active region carrier concentration is determined by the work function of the metal electrode, it is necessary to analyze the device performance by the metal work function condition. In this work, we manufactured doping-less TFET with adapting various metal work function to enhance electrical performance, and conducted CV measurement in MOS structure to confirm Si band bending and charge plasma by analyzing flat band voltage (VFB).DL-TFET was fabricated on SOI wafer and the overall structure is shown in Fig. 1. (a). In the case of the source region, the metal work function must be larger than that of Si to form the p-type active area, and drain region, on the contrary, must have smaller work function for n-type active region. Obviously, gate electrode work function has similar work function to intrinsic Si. For fabricating DL-TFET, we conducted reactive ion etch (RIE) process to define Si active layer and formed gate oxide (SiO2) by thermal oxidation. Then, we deposited gate metal and removed source / drain region oxide for contact hole. Spacer oxide was deposited using PECVD to isolate each metal electrode, finally we deposited source / drain metal. IV characteristics are shown in Fig. 1. (b), (c) when Pt / W / Al is applied at source / gate / drain area and we compared IV curve of various metal electrode and thermal conditions.In addition, to confirm whether the charge plasma was formed as intended, we fabricated MOS capacitor with 10 nm oxide thickness as shown in Fig. 1. (d). Through frequency sweep, we determined suitable bias frequency and conducted CV measurement (see Fig. 1. (e), (f), (g)). Band bending and charge plasma were confirmed by evaluating VFB shift depending on work function of each MOS gate material (see Fig. 1. (h)). Finally, we discussed the optimal metal electrode combination in terms of ambipolar current, off current, on current and SS. Key Words: Charge plasma, Doping-less TFET, Work function, CV measurement References Changho Shin, Jeong-Kyu Kim, Gwang-Sik Kim, Hyunjae Lee, Changhwan Shin, Jong-Kook Kim, Byung Jin Cho, and Hyun-Yong Yu, “Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET With Metal–Interlayer–Semiconductor Source/Drain,” IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 63, No. 11, pp 4167-4172, Nov 2016. doi: 10.1109/TED.2016.2606511 Raymond J. E. Hueting, Bijoy Rajasekharan, Cora Salm, and d Jurriaan Schmitz, " The Charge Plasma P-N Diode" IEEE ELECTRON DEVICE LETTERS, vol. 29, issue 12, pp 1367-1369, Dec 2008. doi: 10.1109/LED.2008.2006864 Acknowledgment * This research was supported by Brain Korea 21 PLUS Program in 2021, the MOTIE (Ministry of Trade, Industry & Energy 20010836) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device. Figure 1