Electrical microstructure evolution of CaCu3Ti4O12 (CCTO) ceramics: From resistive and core shell-like to semiconducting grains

Abstract

We show that CaCu3Ti4O12 (CCTO) ceramics present either giant (>104) or moderate (∼102) dielectric permittivity ε’ at room temperature (RT), depending on the grains resistivity. By sintering at 980 °C, a highly resistive bulk is obtained (resistivity of 5.8 GΩ cm) and no giant ε’ is verified. A semiconducting phase develops into the grains by sintering at 1050 °C, with a remaining thin resistive phase, hence forming a core-shell bulk microstructure. By increasing the sintering temperature to 1100 °C, the semiconducting phase of the bulk grows at the expenditure of the insulating shell, forming the well-known Internal Barrier Layer Capacitance (IBLC) structure. It is therefore proved that the giant ε’ in CCTO ceramics is linked to the grain boundaries dielectric response whose manifestation becomes resolved at RT when the bulk phase is semiconducting in nature. Such an effect is thermally originated during processing and related to Cu migration towards grain boundaries.