Abstract
Through-silicon via (TSV) is an important component for implementing 3-D packages and 3-D integrated circuits as the TSV technology allows stacked silicon chips to interconnect through direct contact to help facilitate high-speed signal processing. By facilitating the stacking of silicon chips, the TSV technology also helps to meet the increasing demand for high density and high performance miniaturized electronic products. Our review of the literature shows that very few studies have reported on the impact of TSV bump geometry on the electrical and mechanical characteristics of the TSV. This paper reports on the investigation of different TSV geometries with the focus on identifying the ideal shapes for improved electrical signal transmission as well as for improved mechanical reliability. The cylindrical, quadrangular (square), elliptical, and triangular shapes were investigated in our study and our results showed that the quadrangular shape had the best electrical performance due to good characteristic impedance. Our results also showed that the quadrangular and cylindrical shapes provided improved mechanical reliability as these two shapes lead to high Cu protrusion of TSV after the annealing process.
Highlights
The increasing demand for lower cost, miniaturized, and multi-functional electronic devices with lower power consumption has given rise to a number of new manufacturing challenges
Design System (ADS), a commercial was used for the electrical simulation, and the adaptive sampling frequency (ASF) method was used for the analysis
This paper reports on the investigation of different through-silicon via (TSV) geometries with the focus on identifying the ideal shapes for improved electrical signal transmission and improved mechanical reliability
Summary
The increasing demand for lower cost, miniaturized, and multi-functional electronic devices with lower power consumption has given rise to a number of new manufacturing challenges To meet these challenges, the electronics packaging R&D industry has worked hard in recent years to develop novel interconnection materials, process techniques, and packaging technologies such as the through-silicon via (TSV) technologies [1,2]. TSV is becoming a promising solution that can offer the shortest interconnection, minimum chip-to-chip bonding pad sizes and spacing, and can greatly improve the density of integration and performance It can provide novel packaging applications for delivering the highest level of silicon integration and space efficiency at the lowest cost [3,4,5]. TSV geometries with the focus theidentifying focus on identifying the ideal for improved electrical signal transmission as for on the ideal shapes forshapes improved electrical signal transmission as well as as forwell improved improved mechanical mechanical reliability. reliability
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
