Efficient hardware trojan diagnosis in SRAM based on FPGA processors using inject detect masking algorithm for multimedia signal Processors

Abstract

The multimedia processor is the most powerful and challenging application in real-time world where Hardware Trojans (HTs) is a significant threat in most of the electronic devices which use Integrated Circuit (IC) as a crucial component. Since IC is manufactured by most of the untrusted designers, there is a possibility of inserting malicious attacks in any stages of fabrication. It is mainly added by an antagonist into the storage cell to make a detection process is a complex task, which creates an impact in the function of the device. To mitigate these issues, an IDM (Inject Detect Masking) algorithm is proposed, and it is implemented in a Look-Up Table (LUT) design, which exploited Stability Enhancing Static Random Access Memory (SESRAM) cell for storing the data bits. HT is injected at the output of the SESRAM cell, and then masking is applied to mitigate the HT. The proposed Inject Detect Masking (IDM) algorithm is designed and simulated in Tanner EDA with 125 nm technology. It is used to multimedia signal processors world in real-time applications to achieve better response in processor end solutions. It increases the detection rate by 8.88%, 8.88%, 5.37%, 4.25% and correction coverage by 5.26%, 28.20%, 21.95%, 13.63%, 11.11%, 7.52% when compared with Online Checking Technique, Simultaneous Orthogonal Matching Pursuit (SOMP) algorithm, Multiple Excitation of Rare Switching (MERS), LMDet and Clustering Ensemble-based Detection respectively.