Efficient CAM cell design for low power and low delay

Abstract

Content-addressable memory (CAM) is the hardware based particular type of memory device utilized for low power and high-speed application. CAMs are developed for precise application without sacrificing their search speed, and it is much faster than random accessmemory (RAM) in search application. CAM executes two essential functions storing and comparing. The additional circuitry during comparison process builds the size of CAM which expands fabrication cost. The new hardware enhances the power consumption since each comparison of the circuitry is dynamic on each clock cycle accordingly. To achieve low power design, some new implementations emulate the operation of CAM by utilizing different CAM cell designs in the CAM architecture. Therefore designing novel CAM cells for low power application in CAM architecture is a challenging task for the designer. This paper compares various CAM cell design at 180nm, 90nm and 45nm for power, delay and analysis is performed in cadence virtuoso tool.