SEU sensitivity analysis of low power, precharge-free modified CAM cell

Abstract

CAM (Content Addressable Memory) is one of the promising memory family used in high speed search applications. CAM power dissipation is more due to large number of search operation. NAND and NOR type match-line CAMs are useful in low power applications but they have drawbacks like charge sharing and short circuit at match-lines of the CAM array. Recently the CAM cell was implemented with free of pre-charge circuit by adding a control bit in order to boost-up the match-line only, but not the internal SRAM. In this paper, we are proposing a precharge-free PMOS logic based CAM cell and comparing the metrics of proposed CAM cell with precharge-free NMOS based CAM cell in terms of delay, power and Power-Delay Product (PDP). The simulations are carried out in technology node Cadence design environment. The simulation results shows the PDP of proposed design is 91.17% reduction than NMOS based precharge-free CAM. We also performed a radiation study on both PMOS and NMOS based precharge-free CAM cell. Match-line of PMOS based CAM cell is more sensitive than Match-line of NMOS based CAM cell. The threshold current value of PMOS based CAM cell is 100μA and for NMOS based CAM cell is 1.3mA.