Abstract
The paper presents a comparison between two of the most popular charge pump structures, the Dickson charge pump and the cascade of voltage doublers. The comparison has been carried out considering power efficiency as the main parameter of interest. The discussion is supported by theoretical analysis and experimental results. To compare the two topologies, two voltage elevators were designed and integrated in a triple-well 0.18-/spl mu/m CMOS technology. The two charge pumps were designed with the same operating clock frequency, the same storage capacitance per stage, and the same number of stages (and, thus, approximately the same area). The comparison showed that the voltage doubler has the higher power efficiency by about 13%.
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