Effects of switching from 〈1 1 0〉 to 〈1 0 0〉 channel orientation and tensile stress on n-channel and p-channel metal–oxide-semiconductor transistors

Abstract

We investigate the effects of switching from 〈110〉 to 〈100〉 channel orientation on NMOS and PMOS transistors. For NMOS transistors, we have experimentally demonstrated that there is negligible electron mobility degradation after the switching. The decrease in on-current (Ion) of 〈100〉 NMOS transistors is caused by an increase in the effective channel length due to a reduction in the lateral ion channeling of the source/drain extension implants and the halo implants. For PMOS transistors, the increase in hole mobility dominates over the reduction of lateral ion channeling, and thus Ion of 〈100〉 PMOS transistor increases. By exploiting the stress insensitivity of 〈100〉 PMOS transistors, we can use a single tensile liner to improve NMOS transistors while not degrading PMOS transistors instead of using a more complicated process involving a tensile stress liner for NMOS transistors and a compressive liner for PMOS transistors.