Abstract
We investigate the effect of applied gate and drain voltages on the charge transport properties in a zinc oxide (ZnO) nanowire field effect transistor (FET) through temperature- and voltage-dependent measurements. Since the FET based on nanowires is one of the fundamental building blocks in potential nanoelectronic applications, it is important to understand the transport properties relevant to the variation in electrically applied parameters for devices based on nanowires with a large surface-to-volume ratio. In this work, the threshold voltage shift due to a drain-induced barrier-lowering (DIBL) effect was observed using a Y-function method. From temperature-dependent current-voltage (I-V) analyses of the fabricated ZnO nanowire FET, it is found that space charge-limited conduction (SCLC) mechanism is dominant at low temperatures and low voltages; in particular, variable-range hopping dominates the conduction in the temperature regime from 4 to 100 K, whereas in the high-temperature regime (150–300 K), the thermal activation transport is dominant, diminishing the SCLC effect. These results are discussed and explained in terms of the exponential distribution and applied voltage-induced variation in the charge trap states at the band edge.
Highlights
Zinc oxide (ZnO) has received considerable interest over the past few decades as a promising material for a variety of applications in electronics, optics, and photonics because it exhibits a direct wide bandgap (~3.37 eV), a large exciton binding energy (60 meV), a variety of nanoscale forms, and piezoelectricity [1,2]
Since the field effect transistor (FET) based on nanowires is one of the fundamental building blocks in potential nanoelectronic applications, it is very important to understand charge transport behaviors in nanowire-based transistors
It has been generally accepted that the contacts between the nanowire and the metal electrodes play an important role in the charge transport properties of nanowire-based FETs due to their large surface-to-volume ratio coupled with unique geometry [10,11,12]
Summary
Zinc oxide (ZnO) has received considerable interest over the past few decades as a promising material for a variety of applications in electronics, optics, and photonics because it exhibits a direct wide bandgap (~3.37 eV), a large exciton binding energy (60 meV), a variety of nanoscale forms, and piezoelectricity [1,2]. Since the FET based on nanowires is one of the fundamental building blocks in potential nanoelectronic applications, it is very important to understand charge transport behaviors in nanowire-based transistors. The electrical properties of nanowire-based FET devices sensitively depend on their size and shape, defects and impurities, and surface states or defects [7,8,9]. It has been generally accepted that the contacts between the nanowire and the metal electrodes play an important role in the charge transport properties of nanowire-based FETs due to their large surface-to-volume ratio coupled with unique geometry [10,11,12]. Lee and coworkers reported the distinct electrical transport features of FETs made from ZnO nanowires with two different types of geometric properties: one type consisted of corrugated nanowires with a relatively smaller diameter and higher density of surface states or defects, and the other type involved smooth
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