Abstract
We report the abnormal behavior of the threshold voltage (VTH) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (VTG), while bottom gate bias (VBG) is less effect than VTG. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of In metal diffusion to the top SiO2/a-IGZO and also the existence of large amount of In+ under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH− at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of VTG both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.
Highlights
INTRODUCTIONSingle gate (SG) amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT)
Single gate (SG) amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT)is widely used for high definition active-matrix liquid-crystal-display (AMLCD) and active-matrix organic-light-emitting-diode (AMOLED) display because of its high field-effect mobility (>10 cm2/V.s), low off-state current and low sub-threshold swing (SS) (< 0.3 V/decade).[1]
We report the abnormal behavior of the threshold voltage (VTH) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs)
Summary
Single gate (SG) amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT). Is widely used for high definition active-matrix liquid-crystal-display (AMLCD) and active-matrix organic-light-emitting-diode (AMOLED) display because of its high field-effect mobility (μFE) (>10 cm2/V.s), low off-state current and low sub-threshold swing (SS) (< 0.3 V/decade).[1] The electrical properties such as transfer and output characteristics and the reliabilities of SG a-IGZO TFTs have been widely studied.[2,3] there are still issues on reliabilities of bias/light/temperature and on performance reproducibility.[4,5,6] To achieve high electrical performances with improved bias/light/NBIS stability, the dual gate (DG) structure of a-IGZO TFTs is investigated, which has two gates with a main bottom gate and an additional top gate.[9] The top gate voltage (VTG) can influence to control the threshold voltage (VTH) of dual gate TFT, while bottom gate sweep. It is found that the top gate bias stress dominates the shift both at top and bottom gate sweep, especially when the top gate stress voltage is larger than bottom gate voltage
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