Abstract

The possibility of optimization of high voltage hybrid SIT-MOS transistors (HSMT) by local reduction of the lifetime near anode emitter and/or reduction of the anode emitter injection ability by three different ways has been investigated using two-dimensional numerical simulation. It has been shown that all of these methods proposed previously for optimization of insulated-gate bipolar transistor (IGBT) are physically equivalent and makes it possible to reduce turn-off energy losses $E_{off}$ in HSMT by 30-40%. Importantly that energy $E_{off}$ in optimized HSMT appears to be 15-35% less than in equivalent trench IGBT under other equal conditions.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.