Effect of post deposition annealing for high mobility 4H-SiC MOSFET utilizing lanthanum silicate and atomic layer deposited SiO<inf>2</inf>

Abstract

We have demonstrated high mobility Si-face 4H-SiC MOSFET results using a novel lanthanum silicate (LaSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) interface engineering and Atomic Layer Deposited (ALD) SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> . In this work, the impact of post deposition annealing (PDA) conditions on the mobility of MOSFET with LaSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> is investigated. The sample received 900 °C PDA in nitrous oxide (N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O) ambient shows the highest mobility and higher PDA temperature reduces the peak mobility. Mobility results measured at elevated temperatures show that the electron mobility of the La-containing devices is limited by the phonon scattering as opposed to the coulombic scattering, indicating improved interface properties.