Abstract

Several stack structures such as 1st ZrO2/Al2O3/2nd ZrO2 (ZAZ), 1st TiO2/Al2O3/2nd TiO2 (TAT), and 1st ZrO2/(Ta/Nb)Ox-Al2O3/2nd ZrO2 (ZTNAZ) as insulator of DRAM capacitor with metal-insulator-metal (MIM) structure have been widely investigated [1-4]. ZAZ is one of the most candidate structure because ZrO2 has relatively high-dielectric-constant (high-k) value (>30) and wide band gap (~5.8 eV) [1,2]. An amorphous Al2O3 interlayer acts as blocking layer to suppress the leakage current through the grain boundaries of ZrO2 layer. An annealing process was generally carried out after ZAZ deposition or TiN/ZAZ/TiN fabrication. The effects of annealing step on k-values of 1st ZrO2 and 2nd ZrO2 layers are not fully understood. In this study, we investigate k-values of ZrO2 layer of TiN MIM capacitors with Al2O3/ZrO2 (AZ) and ZrO2/Al2O3 (ZA) insulators fabricated by post-deposition annealing (PDA) after AZ and ZA insulators deposition or post-metallization annealing (PMA) after TiN top electrode (TE-TiN) deposition.MIM capacitors were fabricated as follows. A 50-nm-thick TiN bottom electrode (BE-TiN) was deposited by reactive sputtering on the P+ Si substrate. In case of AZ stack structure, a 2-nm-thick Al2O3 layer was deposited on BE-TiN by atomic layer deposition (ALD) at 300°C using TMA and water gas, and subsequently ZrO2 layer was deposited on Al2O3 layer by ALD at 300°C using (C5H5)Zr[N(CH3)2]3 precursors and water gas. On the other hand, the ZA stack structure was prepared by depositing a ZrO2 layer and then an Al2O3 layer under same ALD condition. The ZrO2 thickness was varied from 2.8 to 5.7 nm by changing ALD cycles. PDA (ZA wPDA and AZ wPDA) was carried out at 600°C for 1 min in N2. Finally, a 50-nm-thick TE-TiN was deposited to fabricate MIM capacitor. TiN/AZ/TiN and TiN/ZA/TiN capacitors without PDA were also fabricated by PMA (ZA wPMA and ZA wPMA) with the same PDA conditions. All structural MIM capacitors without annealing process (w/o) were prepared as references.The k-value of Al2O3 layer which estimated from capacitance of TiN/Al2O3/TiN capacitors at 0V was found to be 7.7. By using this k-value of Al2O3, each k-value of ZrO2 layer was also estimated from capacitance at 0V. The k-values of ZrO2 layer of all w/o capacitors exhibited about 22 - 25. The k-values of the AZ wPMA increased as the ZrO2 thickness increased and was saturated to 35 when the thickness was over 4.8 nm. The ZA wPMA showed a similar behavior with respect to the ZrO2 thickness, but the saturated k-value was a small value of 31. In the case of the ZA wPDA, we observed a dramatic increase in k-value of ZrO2 layer when the ZrO2 thickness increased from 3.9 to 4.9 nm. The maximum k-value of 44 was about 10 larger than that of the AZ wPDA under the same ZrO2 thickness of 5.7 nm. This difference may be related with coefficients of thermal expansion (CTE) of the Al2O3 (5.4~8.4×10-6 K-1), ZrO2 (8.0~11.0×10-6 K-1) and TiN (9.4~10.3×10-6 K-1). ZrO2 had a similar CTE value of TiN and larger CTE value than Al2O3. In the case of the ZA wPDA capacitor, ZrO2 layer was annealed with an asymmetric structure sandwiched between Al2O3 and TiN with different CTE values during PDA. This asymmetric structure may introduce some stress of ZrO2 layer and results in grain growth and crystallization of high-k phase. It is considered that the k-value became smaller because ZrO2 layer grew freely without stress in the AZ wPDA. The ZrO2 layer of AZ and ZA became symmetric structure by sandwiching between BE-TiN and TE-TiN, and may be suppressed the stress during PMA. To increase k-value of the ZrO2 layer, it is important that the crystal growth of the ZrO2 layer is carried out under stress during annealing process.This study was supported, in part, by JSPS KAKENHI (Grant Nos. JP20H02189 and JP18J22998).[1] Y.- H. Wu et al., Appl. Phys. Lett. 93, 033511 (2008).[2] W. Weinreich et al., J. Vac. Sci. Technol. B 31, 01A109 (2013).[3] T. Sawada et al., J. Vac. Sci. Technol. A 35, 061503 (2017).[4] T. Onaya et al., Thin Solid Films 655, 48-53 (2018). Figure 1

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