Effect of Barrier Thickness on Linearity of Underlap AlInN/GaN DG-MOSHEMTs

Abstract

In this proposed work, an extensive study on the linearity performance of underlap AlInN/GaN double gate metal oxide semiconductor high electron mobility transistors (MOS-HEMT) has been analyzed using 2D Sentaurus TCAD simulation. Specifically a brief comparison is made on the linearity and intermodulation distortion characteristics of the proposed device due to variation of barrier layer thickness from 2 nm to 6 nm. Various parameters such as transconductance ([Formula: see text], second-order transconductance ([Formula: see text]), third-order transconductance ([Formula: see text]), second-order voltage intercept point (VIP2), third-order voltage intercept point (VIP3), third-order input intercept point (IIP3) and third-order intermodulation distortion (IMD3) of underlap AlInN/GaN double gate metal oxide semiconductor high electron mobility transistors (MOS-HEMT) are discussed. The simulated results obtained confirms that by careful optimization of barrier layer thickness linearity characteristics of this proposed device can be improved, which can be suitable for analog and circuit applications.