Drive Current Enhancement in Sub-50 nm CMOS by Reduction of SDE Resistance with Laser Thermal Process

Abstract

In this paper, we report on the ultrashallow junction profiles and good characteristics of sub-50 nm bulk complementary metal oxide semiconductor (CMOS) devices with n+/p+ source-drain extensions (SDEs) formed by laser thermal processing (LTP). By combining LTP with preamorphization and strong-dosage dopant-ion implantation, CMOS drive current can be improved without incurring a cost in terms of short-channel deterioration. The SDE-junction depth, SDE overlap length, and sheet resistance were controlled by the energy of preamorphization implantation, and the first two of these parameters were independent of dopant dosage. This allowed us to design strongly activated and abrupt box-like dopant profiles. With this technique, we obtain improvements in drive current of 13 and 8%, respectively, for p- and n-metal oxide semiconductor field effect transistors at and without inducing any short-channel deterioration. © 2004 The Electrochemical Society. All rights reserved.