Abstract

In this work, a novel and efficient approach is proposed to optimize linearity and efficiency of a power amplifier used in mobile communication applications. A linear and high performance push amplifier is designed and analyzed to extract design equations for an optimum performance. The proposed push amplifier has two sections; an analog section and a switching section. The analog section provides the required linearity and the switching section guarantees the satisfaction of the total efficiency level. Double power supply scheme is used in push amplifiers to enhance its performance. Two separate power supplies are employed for linear and switching sections of push amplifiers which have different voltage levels. The implemented circuit is simulated using HSPICERF with TSMC models for active and passive elements. The proposed power amplifier (PA) provides a maximum output power of 25 dBm and power added efficiency (PAE) as high as 51% at 2.5 GHz operation frequency. At 1-dB compression point, this PA exhibits output power of 25 dBm with 48% PAE and 4.5% error vector magnitude (EVM) which is appropriate for 64QAM OFDM signals.

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