Abstract

A current improved and electric field reduced double-gate (DG) polycrystalline silicon thin-film transistor with two-step source/drain (DGTSD-TFT) design is proposed and demonstrated in this study. The two-step source/drain (TSD) design, which consists of a raised source/drain (RSD) area together with a partial gate overlapped lightly doped drain (P-GOLDD) structure, can lower the device drain electric field (DEF) to reveal a better device performance. Comparisons have been made with respect to a traditional single top gate (STG) device. The operation current of the proposed DGTSD-TFT is almost twice as large as that of the STG structure. The OFF-state leakage current and kink effect, as well as the ON/OFF current ratio for this double-gate and two-step source/drain structure, are also improved simultaneously because of a reduced DEF. A hot carrier stress test reveals that that two-step source/drain structure can achieve more stable device characteristics than the traditional device.

Highlights

  • The low temperature polycrystalline silicon thin film transistor fabricated on glass substrates has been widely studied and used for active-matrix organic liquid crystal display (AMOLCD)and active matrix organic light emitting (AMOLED) display applications, peripheral driver and pixel switches circuits [1], because it has a high electron mobility and On-state current when compared to the amorphous silicon (a-Si) TFT [2]

  • Active matrix organic light emitting (AMOLED) display applications, peripheral driver and pixel switches circuits [1], because it has a high electron mobility and On-state current when compared to the amorphous silicon (a-Si) TFT [2]

  • The most critical issue for the conventional poly-Si TFT is its high drain electric field (DEF) that causes a great deal of impact ionization, which leads to an intense kink effect and degrades the device performance [3,4]

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Summary

Introduction

Active matrix organic light emitting (AMOLED) display applications, peripheral driver and pixel switches circuits [1], because it has a high electron mobility and On-state current when compared to the amorphous silicon (a-Si) TFT [2]. The most critical issue for the conventional poly-Si TFT is its high drain electric field (DEF) that causes a great deal of impact ionization, which leads to an intense kink effect and degrades the device performance [3,4]. This drawback limits this device’s use in digital and analog circuits on glass for high resolution displays. The offset-gate device was shown to lower the DEF effectively, but its On-current was significantly decreased because of an additional series resistance [6]

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