Distributed coding of evidence accumulation across the mouse brain using microcircuits with a diversity of timescales.

Abstract

The gradual accumulation of noisy evidence for or against options is the main step in the perceptual decision-making process. Using brain-wide electrophysiological recording in mice (Steinmetz et al., 2019), we examined neural correlates of evidence accumulation across brain areas. We demonstrated that the neurons with Drift-Diffusion-Model-like firing rate activity (i.e., evidence-sensitive ramping firing rate) were distributed across the brain. Exploring the underlying neural mechanism of evidence accumulation for the DDM-like neurons revealed different accumulation mechanisms (i.e. single and race) both within and across the brain areas. Our findings support the hypothesis that evidence accumulation is happening through multiple integration mechanisms in the brain. We further explored the timescale of the integration process in the single and race accumulator models. The results demonstrated that the accumulator microcircuits within each brain area had distinct properties in terms of their integration timescale, which were organized hierarchically across the brain. These findings support the existence of evidence accumulation over multiple timescales. Besides the variability of integration timescale across the brain, a heterogeneity of timescales was observed within each brain area as well. We demonstrated that this variability reflected the diversity of microcircuit parameters, such that accumulators with longer integration timescales had higher recurrent excitation strength.Significance StatementIn this paper we characterized the perceptual decision-making process across the mouse brain. Our findings shed more light on the decision-making process by analyzing the brain-wide electrophysiological recording dataset. This paper contains a comprehensive analysis to characterize different aspects of the evidence accumulation process, including the distribution of accumulator-like neurons, the timescale of information integration, accumulation architecture, and the relationship between accumulators' timescale and their integration circuit properties.