Abstract
In this paper, a DCT-based image processing system is developed on Xilinx Spartan3E Field Programmable Gate Array (FPGA) device using embedded development kit (EDK) tools from Xilinx. Two different hardware architectures of two-dimensional (2-D) DCT have been implemented as a coprocessor in an embedded system. One is direct implementation of 2-D DCT by cascading two 1-D DCT. Another is 2-D DCT implementation with control and architecture optimization. In addition, the hardware cost of these two architectures is compared for benchmark images.
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