Device-Circuit Co-Optimization for Negative Capacitance FinFETs based on SPICE Model

Abstract

This article presents a device-circuit co-optimization on Negative Capacitance FinFETs (NC-FinFETs). A physics-based SPICE model that combines industry-standard BSIM-CMG model and Landau Khalatnikov (LK) equation is developed for the NC-FinFETs. Different ferroelectric areas (AFE) are selected to analyze the characteristics of the NC-FinFETs. The influences of work function (WF) and capacitance matching on NC-FinFETs are investigated to further optimize the DC performance of inverters. Based on the NC-FinFETs SPICE model, we simulate the transient characteristics of the ring oscillator (RO) and analyze the delay-energy characteristics of the RO in detail. At low supply voltage $(V_{DD})$ the delay of NC-FinFETs-based RO is much smaller than that of conventional FinFETs-based RO. Under the same delay, the energy consumption of NC-FinFETs-based RO is 50.4% lower than that of FinFETs-based RO. This result shows that NC-FinFETs have great advantages in low-power applications.