Abstract

Full 3D numerical process and device simulations have been performed in order to optimize device design of multigate FETs (MuGFETs) and the underlying fabrication processes. At first process simulation parameters have been calibrated to measurement data of pre-development process results. Based on this, device electrical performance has been assessed for different gate length, fin doping, implant conditions, fin height, fin width, gate oxide and box thickness by means of typical device parameters.

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