Abstract
This study presents a pioneering approach to designing a Vedic multiplier using full adders and conducts a comprehensive power analysis to assess its energy efficiency. Vedic mathematics, rooted in ancient Indian principles, offers innovative techniques for rapid and precise computations. Leveraging these principles, we propose a Vedic multiplier architecture that exploits full adders as fundamental building blocks, enabling efficient multiplication operations through the Gate Diffusion Input (GDI) method. The thorough power analysis ensures a comprehensive evaluation of its energy-saving potential. This research aims to explore how Vedic mathematics can offer alternative and energy-efficient solutions for modern computational systems, particularly in performing multiplication operations. By embracing this novel methodology, we aspire to unlock new possibilities for efficient and sustainable computing paradigms.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
