Abstract
This study presents a pioneering approach to designing a Vedic multiplier using full adders and conducts a comprehensive power analysis to assess its energy efficiency. Vedic mathematics, rooted in ancient Indian principles, offers innovative techniques for rapid and precise computations. Leveraging these principles, we propose a Vedic multiplier architecture that exploits full adders as fundamental building blocks, enabling efficient multiplication operations through the Gate Diffusion Input (GDI) method. The thorough power analysis ensures a comprehensive evaluation of its energy-saving potential. This research aims to explore how Vedic mathematics can offer alternative and energy-efficient solutions for modern computational systems, particularly in performing multiplication operations. By embracing this novel methodology, we aspire to unlock new possibilities for efficient and sustainable computing paradigms.
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