Abstract
A straightforward methodology is presented to distinguish the presence of large amounts of interface traps causing weak Fermi-level pinning from other effects in MOS capacitors based on GaAs or other alternative semiconductors. This is done by using a simple extraction of a characteristic time constant. The observations for GaAs MOS capacitors are similar to those for Ge MOS capacitors. GaAs MOS capacitors using Ga 2O 3 and Al 2O 3 as gate dielectric were investigated and based on this methodology weak Fermi-level pinning due to interface traps was concluded for these devices.
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