Design of quaternary MIN and MAX circuits using graphene nanoribbon field effect transistors

Abstract

This paper presents the design of digital logic schematics in quaternary logic. The quaternary logic is considered as best choice over the conventional two-valued logic due to its advantages such as faster computations, large memory storage, reduced interconnect length, ability to transmitting and receiving the large information, and simplification in testing. These advantages allow designing high performance circuit’s in the future integrated circuits. The new method is projected to develop the quaternary logic circuits utilizing graphene nanoribbon field effect transistors (GNRFETs). The quaternary logic circuits are developed based on GNRFETs wonderful properties, such as controlling the threshold voltage by changing the GNR width. This property makes them compatible to develop the multi-threshold digital circuits. To ensure the functionality of the digital circuits, the GNRFET based quaternary minimum (MIN) and maximum (MAX) circuits are developed. The proposed designs are simulated extensively in HSPICE tool for performance analysis. In comparison with the quaternary CNTFET based circuits, the proposed circuits optimized by 67.13%, 18.7%, 73.16% and 25.88%, in power consumption, delay, power delay product (PDP) and circuit area, respectively.