Design of polarity hardening SRAM for mitigating single event multiple node upsets

Abstract

With technology scaling down, the charge sharing among multiple nodes has becoming significant, making Single Event Multiple Node Upsets (SEMNUs) has become one of the major concern in memory cell designs. In this paper, a design of polarity hardening memory cell (PH_14T) is proposed for mitigating Single Event Multiple Node Upsets (SEMNUs). Through the 3D TCAD mixed-mode simulation established that the high robustness against SEU and SEMNUs of the PH_14T cell. Additionally, Cadence Spectre simulation results demonstrated that the proposed PH_14T cell has smaller write access time, lower power consumption, and highest critical charge compared to radiation-hardened cells. Monte Carlo simulation further confirmed the high radiation tolerance and high reliability of the proposed cell against SNU and DNU.