Design of MUX based Flash ADC for Reduction in Number of Comparators

Abstract

This paper presents the design of multiplexer-based Flash ADC with a reduced number of comparators to achieve less area and less power consumption with increased resolution. As the number of bits increases, flash ADC needs a huge number of comparators which increases the area of the chip, and also the power consumption will increase. The conventional N-Bit Flash ADC requires a 2N number of resistors and 2N-1 number of preamplifiers and comparators. Here the number of comparators is reduced by using multiplexers by providing reference voltage through multiplexers. And also, the encoder is designed using multiplexers. The 6-bit Flash ADC is designed utilizing multiplexers and a reduced number of comparators. The Simulation is done by using the proteus 8.9 design suite with 1v supply voltage.