Design of high gain, high bandwidth neural amplifier IC considering noise-power trade-off

Abstract

Low Noise Neural amplifiers are used for amplifying low amplitude neural spikes in Neural recording systems. The need for low noise is emphasized by the presence of background noise during recording. Additionally, the need of more number of recording sites and avoiding of excessive heating has given rise to low area and power requirement. In this paper, the design of a neural amplifier IC consisting of two high performance neural amplifiers for recording action potentials/spikes are proposed. One amplifier is based on capacitive feedback topology and is noise efficient while the other one is based on open loop topology and is area as well as power efficient. Both amplifiers use a self-biased high swing cascode current mirror load based Folded Cascode Operational Transconductance Amplifier (OTA), which results in an efficient performance with a trade-off between noise and power. The use of such a current mirror load in the OTA helps in achieving a better output swing. The use of source degenerated resistors assures current scaling which results in low input referred noise. Simulations have been carried out using technology parameters of SCL 180 nm foundry. Simulation results and comparative analysis illustrate that the proposed closed loop neural amplifier reports a significant improvement in gain, CMRR and bandwidth while the proposed open loop neural amplifier reports an improvement in power dissipation as compared to most of the state of art designs. Monte Carlo analysis is performed which gives a low average standard deviation, which further validates consistency and reliability of both the proposed designs.