Design of DG-CNFET for reduction of short channel effect over DG MOSFET at 20nm

Abstract

As aggressive scaling of conventional MOSFETs channel length reduces below 100 nm and gate oxide thickness below 3nm to improved performance and packing density. Due to this scaling short channel effects (SCEs) like threshold voltage roll-off & gate leakage current play a major role in determining the performance of scaled devices. The double gate (DG) MOSFETs are electro-statically superior to a single gate (SG) MOSFET and allows for additional gate length scaling. In recent years, nanotechnology has achieved significant progress in fabrication of various devices at nanometer like molecular diodes and Carbon Nanotube field effect transistors (CNFETs). This has provided new opportunities for VLSI circuits to achieve continuing cost minimization and performance improvement in a post-silicon-based-CMOS-technology era. Carbon Nanotube based FET devices are getting more and more importance today due to improved I-V characteristics and high channel mobility are considered as a replacement for future semiconductor devices.This paper presents design of DG MOSFET and DG CNFET by changing material like polysilicon with carbon nanotube at 20 nm technology. Simulation work on both devices has been carried out and presented in paper. Comparative study had been carried out for threshold voltage VT, IOFF& ION current. It observed that DG CNFET has good control on leakage current &ratio ION/IOFF of DG-CNFET is 6.05 times greater than the DG-MOSFET.