Abstract
In this paper, we propose a new paradigm for clock distribution that uses current, rather than voltage, to distribute a global clock signal with reduced power consumption. The Current-mode (CM) signaling can be used for one-to-many clock distribution network. To accomplish this, we create a new high-performance current-mode pulsed flip-flop with enable (CMPFFE) using Tanner tool in 180nm CMOS technology. When the CMPFFE is combined with a CM transmitter, the first CM clock distribution network exhibits 32% lower average power compared to traditional voltage mode (VM) clocks. CM clocking can play an important role in low-power systems. CM signaling offers many potential advantages such as higher operating speed, low voltage operation, ease of processing and reduced power consumption compared to voltage-mode (VM) techniques.
Published Version
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