Design of cost-efficient memory-based FFT processors using single-port memories

Abstract

This paper proposes a new memory-based FFT processor. Only an N-bit single-port memories are required for implementing an N-point FFT processor. This reduces the area, power, and test cost of the proposed memory-based FFT processor. Moreover, a time/space-embedded signal flow graph is proposed to verify the functionality of our proposed memory-based FFT processor. Experimental results show that area cost of the memories in the proposed FFT processor is much lower than those described in the existing works.