Design of compact static CMOS carry look-ahead adder using recursive output property

Abstract

A high-speed adder scheme based on transistor sharing in multiple output static CMOS complex gates having recursive relations among output expressions (called recursive output property) is introduced. A brief transistor sharing technique for extracting the subfunction from the given Boolean function implemented with a static CMOS complex gate is described, and the technique applied to the design of a 32 bit CLA (carry look-ahead adder). Simulation using HSPICE with 1.5 μm CMOS model parameters for the case of a 32 bit carry look-ahead adder has shown a reduction of the total number of transistors in the 4 bit carry look-ahead circuit from 56 of the conventional scheme down to the 32 of our proposed scheme with a speed improvement of ̃ 12.5% for 32 bit addition.