Design of all-optical parallel multipliers using semiconductor optical amplifier-based Mach–Zehnder interferometers

Abstract

Due to the benefits of low power, high bandwidth and complementary metal-oxide-semiconductor (CMOS) compatibility, the design of optical circuits has spurred great attention among researchers in the domain of electronic design automation. With this motivation, all-optical combinational and sequential circuits such as adders, multiplexers, multipliers and flip-flops have been explored in recent times. In this paper, we have explored the designs of all-optical array multiplier and four types of parallel multipliers (carry save adder multiplier, Wallace tree multiplier, Dadda multiplier and reduced area multiplier) using two different design approaches named as Design1 and Design2. In order to design these multipliers, semiconductor optical amplifier (SOA)-based Mach–Zehnder interferometers (MZIs) have been used as the basic optical component. The basic MZI switch, full adder and 2-bit multiplier have been simulated using OptiSystem software to analyze the power loss. Furthermore, an all-optical merged multiplier has been designed, which is often used in digital signal processors. In comparison with other designed multipliers, it is evident from the simulation results that the MZI-based reduced area multiplier of Design1 approach has the highest performance in terms of speed, while the MZI-based carry save adder (CSA) multiplier with Design1 approach has the least optical cost.