Analysis and Design of High Speed and Low Power Finite Impulse Response Filter Using Different Types of Multipliers

Abstract

AbstractFilters with a finite impulse response (FIR) are widely utilized in high-speed digital signal processing (DSP) applications. Digital filters have a spectacular contribution in several applications related to signals. Filtering is a technique for obtaining the desired output by manipulating the input data. This paper proposes the FIR filter using different types of multipliers. The proposed FIR filter is made up of a combination of multipliers and adders. The Dadda multiplier has three multiplication steps for partial product reduction and has specific methods to minimize the parameters. To minimize the delay and lower the area, the Dadda multiplier is used together with the exact compressor. This paper compares performance parameters of the FIR filter, which contains various multiplier architectures like the Dadda multiplier with exact compressor, Wallace tree multiplier, and Baugh Wooley multiplier. Dadda multiplier with exact compressor provides reduced 27.27% delay as compared to Wallace tree multiplier and 18.9% compared to Baugh Wooley multiplier. LUTs are 14.28% minimized as compared to other multipliers. Synthesis and simulations are done using Xilinx ISE 14.7.KeywordsExact compressorDadda multiplierApproximate compressorWallace tree multiplierBaugh wooley multiplier