Design of a NMOS-triggered SCR for dual-direction low-voltage ESD protection

Abstract

An improved NMOS triggered dual-direction silicon controlled rectifier (NMOS-DDSCR) device is fabricated in 0.18 μm Silicon-on-Insulator (SOI) Bipolar-CMOS-DMOS (BCD) process. The proposed NMOS-DDSCR structure is designed based on the conventional DDSCR structure, which adds two additional auxiliary trigger paths achieved by NMOS transistors, diodes, and RC coupling circuits. The internal mechanism of NMOS-DDSCR is analyzed using two-dimension (2D) TCAD simulations, and the ESD performance is characterized by means of transmission line pulse (TLP) and very-fast TLP (VFTLP) measurements. Superior to the conventional DDSCR, the proposed NMOS-DDSCR exhibits a lower trigger voltage of 8.2 V, a higher human-body model (HBM) level of 4.0 kV, and a smaller leakage current of about 160 nA for low power application. In addition, the proposed NMOS-DDSCR has lower overshoot voltage, faster turn-on speed, and sufficient latchup immunity, which can be applied to ESD protection of 5.0 V input and output (I/O) pins in smart power integrated circuit (SPIC).