Abstract
This paper presents the design of a high definition video communication system with real-time performance in the network. In order to process and transmit the high definition video, the design combines FPGA and SOC, follows the H.264 video coding compression. The FPGA realizes the highspeed video acquisition via Cameralink interface, and convert the raw image to ITU-R BT.1120 stream. The SOC contains CPU and Codec, it compresses the BT.1120 stream to H.264 steam and transmit the stream in the network. The low-delay rate control algorithm can limit the bitrate in a very low level. The result shows that the system reduces bandwidth and lowers the latency, the design is adaptable to the real time environments.
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