Abstract
In this study, the design, fabrication, and calibration of the piezoresistive stress sensors [1–18] embedded in a TSV (through silicon via) interposer in a 300mm wafer are investigated. The results presented herein should be useful for the development of 3D integration such as measuring the strength of the TSV device and interposer wafers, during and after all the processes such as wafer thinning, SiO 2 deposition, metallization, and electroplating.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
