Design and Self-Calibration Techniques for Inductor-Less Millimeter-Wave Frequency Dividers

Abstract

This paper presents several design techniques to widen the operating frequency range and increase the locking range of dynamic current-mode latch-based inductor-less millimeter-wave frequency dividers. A self-calibration technique is introduced to guarantee frequency locking over a wide frequency range with low-input amplitude and over process, voltage, and temperature variations, thereby optimizing power consumption and ensuring robustness. Three divide-by-four prototypes incorporating the aforementioned techniques are designed to cover a frequency range exceeding 16–67 GHz. Fabricated in a 65-nm CMOS technology, the prototypes achieve min-average-max increases of 10%–47.5%–121.4% in fractional bandwidth over the state of the art. The first and third prototypes consume 3.7/6.2 mA (min/max) from a 1-V supply and achieve a figure of merit of 4.1/7.15 GHz/mW (min/max), while the second prototype consumes 3.9/6.7 mA (min/max) from a 1.1-V supply and achieves a figure of merit of 3/6.98 GHz/mW (min/max). The prototypes occupy the active areas of $11 \times 42/11 \times 53~\mu \text{m}^{2}$ (min/max). Finally, with the self-calibration scheme, the dividers operate with input power less than −10 dBm, supply voltage variation of ±100 mV.