Design and implementation of crossbar scheduler for system‐on‐chip network in quantum dot cellular automata technology

Abstract

System‐on‐chip (SoC) provides a comprehensive solution to the design challenges involved in the domain of telecommunication network, multimedia, and consumer electronics. One of the crucial components of any SoC network is the crossbar‐based switching circuit which synchronizes the network traffic and provides a congestion‐free path for communication. With the increase in number of on‐chip components the power consumed by crossbar schedulers takes a significant amount of the entire power budget. This indicates the need for techniques to reduce the area and energy consumption of on‐chip schedulers. In this article, we have proposed the design of on‐chip schedulers for implementation in quantum dot cellular automata (QCA) technology. QCA is the latest nano computation technology and emerging as an alternative to replace the conventional CMOS devices. The salient features of QCA are highly dense structure, extremely low power consumption, and very high processing speed. The proposed on‐chip scheduler circuit has been simulated using QCA designer tool. To perform a fair comparison, we also synthesized the proposed design in CMOS technology. The results obtained from comparison indicate that the QCA circuits occupy less area and power consumption than the traditional CMOS technology.