Degradation Mechanism and Failure Analysis of Planar Type SiC MOSFETs Under Cyclic Stress of Surge Current

Abstract

The degradation behavior of planar silicon carbide metal oxide semiconductor field effect transistors (SiC MOSFETs) in terms of electrical characteristics is explored in this work under cyclic stress of surge current.Before and after surge current stress, planar-type SiC MOSFET is subjected to scanning electron microscope (SEM)-based failure analysis. During the surge current cyclic stress investigations, the accumulation of oxide trap charge and interface trap density leads to a drop in the threshold voltage(V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> ) under surge current stress, according to the experimental data. The on-resistance(Rds <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(on)</inf> ) displays the opposite tendency to the V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> during surge current cycling. The fact that it is a degradation phenomenon induced by the combined effect of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</inf> and package degradation caused by repetitive cycle thermal stress of the device is confirmed by testing. According to SEM studies, the major reason of SiC MOSFET failure following surge current cycling stress is that the surge current causes the Aluminum (Al) at the source terminal to melt and subsequently enter into the gate terminal, resulting in a gate-source short circuit and device failure.