Degradation in Low-Temperature Poly-Si Thin Film Transistors Depending on Grain Boundaries

Abstract

The low-temperature poly-Si process is one of the most promising technologies for realizing new displays such as system on panel. For this purpose, an improvement in the reliability, as well as promoting the electric performance is very important. In this work, we attempted to study the degradation in TFTs by hot-carrier and joule heating effects focusing on the crystallinity of poly-Si thin films. For the evaluation of the hot-carrier effect, we found that the grain size dependence of hot-carrier degradation differed between the cases of DC and AC stresses in both n-channel and p-channel thin-film transistors (TFTs). The difference in the grain size dependencies is attributed to the difference between DC and DC stresses in degradation mechanism. For the evaluation of thermal degradation, a universal relationship between the temperature and the amount of the voltage shift in n-channel TFT was observed independent of the crystallinity of the films used. It was considered that electron injection into gate oxides is one of the dominant causes of thermal degradation.