Abstract
About half of the logic circuit transistors of a modern integrated circuit design reside inside the scan flip-flops [1]. Even though prior work analyzed detection of defects in traditional master-slave flip-flop circuits, to the best of our knowledge, this work is the first one regarding detection of defects in a sense-amplifier-based flip-flop, which is a preferred design style in some high-speed low-power designs. In this work, we uncover a class of resistive open and resistive short defects in such a flip-flop design, which show a great difference in their detection response to launch-off-shift versus launch-off-capture due to their sensitivity to clock-gating and data input transitions.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
