Abstract
This paper presents a detailed analysis for the detection of resistive open and resistive short defects using delay test for a didactic circuit implemented in 28nm UTBB FDSOI technology. The two different VT options offered by the technology, i.e. Regular-VT (RVT) and Low-VT (LVT), are explored. Based on HSPICE simulations, this work determines the most suitable operating conditions in terms of power supply and body biasing to achieve maximum coverage of resistive short and resistive open defects in the context of delay test. Results show that low supply voltage along with reverse body biasing favors the detection of resistive short defects, whereas high supply voltage combined with forward body biasing proves to be more appropriate for detection of resistive open defects.
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