Abstract

This research paper is a survey of the current status of research and practice in various disciplines of low power VLSI developments. The paper briefly discusses the rationale of the contemporary, and concentrates on low power design, it presents the metrics and techniques that are used to access the merits of the assorted proposed for the improved energy efficiency. Power dissipation [1], [5] has become an important consideration in terms of performance and scope for VLSI chip design. The research paper describes the decoding strategies, methodology, and techniques for low power system design. Here also we have proposed the decoding technique and compared with silent coding to scale back the transition state and conserved the power which is additionally described during this research. KEYWORDS—Power minimization, decoding technique, silent coding.

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