DC and linearity performance of a novel Si0.6Ge0.4/Ge Dopingless Tunnel FET for ultra-low voltage applications

Abstract

The Charged-Plasma (CP) concept-based Dopingless tunnel field-effect transistor (DLTFET) has emerged as a potential metal-oxide-semiconductor-field-effect transistor (MOSFET) successor, demonstrating immunity towards random dopant fluctuations (RDFs) and extremely low leakage currents. With that in mind, we investigate a Si 0.6 Ge 0.4 /Ge hetero-junction DLTEFT with a high-κ dielectric (TiO 2 ), represented by HJ HD DLTFET throughout this manuscript. The drain of HJ HD DLTFET is made up of Si 0.6 Ge 0.4 and source, and the channel is made up of Ge. Additionally, a high-κ dielectric has been applied to suppress off-state current and provide better insulation. Moreover, a comparative analysis is performed between conventional DLTFET and HJ HD DLTFET using the ATLAS device simulator. The simulation results for HJ HD DLTFET offers an improvement in on-state current (~1000 μA/μm), improved I ON /I OFF ratio (~1014), and subthreshold swing (~36.14 mV/decade) at 1.5 V of the gate voltage (V G ) and 0.3 V of the drain voltage (V D ). Additionally, the comparative analysis of both devices is done for linearity in terms of second- and third-order voltage intercept points (VIP 2 , VIP 3 ), third-order intercept input power (IIP 3 ), intermodulation distortion (IMD 3 ), and 1-dB compression point. The appreciable attributes demonstrated by HJ HD DLTFET promotes its adeptness in low-voltage and low-power applications.