Abstract
We combine 2-tap feed-forward amplitude equalization with phase equalization by 4-tap integrated pulse-width modulation. In a $\text{V}_{\mathbf {SS}}$ -terminated transmitter, amplitude equalization is selected for pull-up data transmission, and phase equalization for pull-down data transmission, and the strength of equalization can be controlled depending on channel losses. This combines the strength of amplitude equalization with the energy efficiency of phase equalization. A prototype quarter-rate transmitter for memory interfaces, fabricated in a 65nm CMOS process, performed single-ended signaling at a data-rate of 16Gb/s/pin over a channel with a loss of 14.7dB. Its energy efficiency is 1.04pJ/bit/pin and the figure-of-merit is 0.070pJ/bit/pin/dB.
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