Abstract
In this work, a dramatic reduction in current collapse is achieved in GaN-based high-electron-mobility transistors (HEMTs) using dual-layer SiNx stressor passivation (DSSP), and the related mechanism is proposed. The SiNx compression neutralizes the inherent piezo polarization caused by the lattice mismatch at the heterojunction and effectively mitigates the peak electric field crowding at the drain-side gate edge, as supported by technology computer-aided design simulation. Thus, the inverse piezoelectric effect is suppressed and the trapped charge density is reduced under high electrical stress. As a result, the current collapse effect can be significantly restrained. Upon pulsing (Vg = −6 and Vds = 20 V), the device with DSSP exhibits a negligible current collapse (∼3%), which is significantly lower than the baseline device (∼34%). Moreover, it shows a one-order-of-magnitude reduction in gate leakage and a significant enhancement in gate stability. These results prove that the DSSP process is an attractive technique to facilitate high-reliability GaN-on-Si HEMTs.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.