Abstract

In this work, the breakdown of 4H-SiC MOSFETs was correlated with the presence of different crystalline defects in the 4H-SiC epitaxial layer. First, in a wafer level characterization, the devices not working at t = 0 s showed the presence of down-falls and were discarded. Then, the Fowler-Nordheim (FN) gate bias conduction was used to screen the remaining packaged MOSFETs. In particular, the devices failing under high temperature gate bias (HTGB) stress exhibited an anomalous FN behavior and the presence of a surface bump. Finally, a threading dislocation (TD) was systematically found at the breakdown location during high temperature reverse bias (HTRB) stress. Scanning probe microscopy (SPM) techniques revealed the increase of the minority carrier concentration close to the defect up to 13 orders of magnitude larger than in the ideal 4H-SiC epitaxial layer. In this way, the key role of the TD in the dielectric breakdown of 4H-SiC MOSFET was unambiguously demonstrated.

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