Abstract

The GPIOs with a wide supply voltage range support help in interfacing several chips operating on different voltage islands. The down side of supporting a wide supply voltage range is either significant increase of silicon area for simpler driver or significant increase in driver complexity for optimized area. In this paper, we present a hybrid approach to support a wide supply voltage range while an insignificant increase in design complexity and area. The proposed circuit is designed in 180nm CMOS process and supports up to 200MHz transaction speed at 100pF load.

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