Abstract
The promising use of non-overlapped implantation (NOI) n-type MOSFETs as nonvolatile memory (NVM) devices has received considerable interest owing to their simple device structure and compatibility with logic CMOS processing. In NOI n-type MOSFETs, the charge distribution by channel hot electron injection (CHEI) programming markedly differs from that in other charge trapping devices in terms of electron injection distribution. In this study, hot hole injection (HHI) in NOI NVM devices is investigated using Technology Computer Aided Design (TCAD) simulations, measured program/erase speeds, and charge pumping (CP) techniques. Furthermore, HHI efficiency is theoretically deduced and compared with that of silicon–oxide–nitride–oxide–silicon (SONOS) devices. Similar to the results for SONOS device, the lateral fields by VD biases significantly enhance HHI for erasing NOI devices. However, preprogrammed electrons are also dominant in erasing NOI devices. On the basis of the CP results, the hole distribution by HHI in NOI NVM devices strongly correlates with the distribution of preprogrammed electrons.
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