Characterizing damage to ONO dielectrics induced during programming SONOS/NROM TM non-volatile semiconductor memory (NVSM) devices

Abstract

We present experimental results on scaled silicon-oxide–nitride-oxide–silicon (SONOS/NROM TM) transistors using a variety of programming mechanisms. These devices store holes and electrons in traps in a nitride layer in the gate dielectric. Programming is achieved with a variety of mechanisms: modified Fowler–Nordheim (MFN) tunneling, channel hot electron injection (HEI), and hot hole injection (HHI). All measurements are performed on transistors with gate dielectrics composed of a tunneling oxide ( X OT), silicon-nitride charge-storage layer ( X N), and a blocking oxide ( X OB) of 4, 4.2, and 4.4 nm (NROM TM) or 2, 7, and 4 nm (SONOS), respectively. Charge pumping measurements are employed to characterize the interface trap density of fresh devices and monitor the generation of new interface traps during write/erase operations. We study the damage to ONO dielectrics caused by write/erase cycling by comparing interface trap densities for SONOS/NROM TM devices programmed using varying charge-injection mechanisms after 10 6 write/erase cycles for 10 year retention.